AI Memory Shortage: Why the Crunch Could Last Until 2030

SK hynix has delivered a warning that should concern anyone following the artificial intelligence industry: the world may struggle to manufacture enough memory chips to satisfy demand until 2030.

The South Korean semiconductor giant made the forecast on October 28, alongside record third-quarter earnings. Its revenue reached 104.6 trillion won, while operating profit climbed to 83.3 trillion won, driven by soaring prices and demand for advanced memory products. The company also announced a shareholder return program totaling approximately 100 trillion won, equivalent to roughly $75 billion at the exchange rates reported around the announcement.

But the most important part of the announcement wasn’t the profit or the shareholder payouts. It was SK hynix’s assessment that memory demand could continue exceeding supply for another four years, despite major investments in new production capacity.

The warning goes to the heart of the AI infrastructure boom. Nvidia, AMD and the companies developing custom AI processors can build increasingly powerful chips, but those processors still need enormous quantities of data delivered at extraordinary speeds. Without sufficient memory capacity and bandwidth, much of their theoretical computing power goes unused.

And unlike software, semiconductor manufacturing capacity cannot be expanded with an update or a larger cloud subscription. Building factories, perfecting advanced manufacturing processes and assembling high-bandwidth memory are expensive industrial challenges measured in years.

What SK hynix actually predicted about 2030
Why faster AI processors need faster memory
What makes high-bandwidth memory different?
Why HBM production is so difficult to expand
HBM4 is already changing the AI hardware race
Can new factories solve the shortage?
Will the AI memory shortage affect gaming PCs?
What a prolonged shortage would mean for AI
How credible is the 2030 prediction?

What SK hynix actually predicted about 2030

The company’s official third-quarter earnings announcement makes an unusually long-range prediction. SK hynix expects a structural imbalance between memory supply and demand to persist through 2030, citing the growing complexity of advanced manufacturing and the time required to build new facilities.

That is a forecast, not a guarantee of uninterrupted shortages. It reflects the company’s assessment of expected demand, available production capacity and the investments currently being planned.

The scale of its existing customer commitments nevertheless gives the forecast substance. SK hynix says it has signed long-term supply agreements with 14 major customers, including leading cloud service providers. Those contracts already cover more than 50% of its total production capacity for both 2027 and 2028.

During its earnings conference call, management also indicated that customer requests for high-bandwidth memory substantially exceed the quantities it can currently supply. The company described its DRAM and HBM production as effectively committed through 2029 when existing agreements and specific negotiations are considered together.

There is an important distinction here. Signed contracts covering more than half of future capacity are firmer evidence than demand still under negotiation. The latter improves visibility but does not mean every chip has already been sold under a binding agreement.

SK hynix is also forecasting a broader market for AI computing. Its outlook assumes that demand will increasingly come not only from the largest cloud companies, but also from enterprises, national AI infrastructure projects and eventually applications such as autonomous vehicles and robotics.

The question is whether the memory industry can expand quickly enough to keep up.

Why faster AI processors need faster memory

Modern AI accelerators contain enormous numbers of processing units capable of performing mathematical operations in parallel. That makes them particularly effective at the matrix calculations used in machine learning.

But processing power is only useful when the necessary data arrives quickly enough.

An AI model contains numerical parameters, often called weights, that must be accessed during computation. Running the model also requires temporary data, including intermediate results and, for many language-model workloads, information retained from previous tokens.

Some operations are limited primarily by computing power. Others are limited by how quickly data can be transferred between memory and the processor.

This is known as the memory wall: the growing difficulty of feeding increasingly powerful processors with enough data to use their capabilities efficiently.

Two characteristics determine much of a memory system’s usefulness.

Capacity determines how much information it can hold. For AI, that influences whether model weights, temporary data and other working information can fit in the available memory.

Bandwidth determines how much data can move between memory and the processor per second. A system may have enough capacity to store a model but still run it inefficiently because the processor spends too much time waiting for data.

Latency matters too, although it describes something different: the delay before a particular memory access can begin delivering useful information.

Consider a powerful gaming GPU. Its processing units need textures, geometry and other graphics data. If memory cannot supply those assets fast enough, performance suffers even when the GPU has substantial computational capability.

An AI accelerator faces a related problem, often at a much larger scale. Instead of rendering a game scene, it may be processing billions of model parameters, handling long sequences of tokens or coordinating computations across multiple accelerators.

Increasing arithmetic performance without improving memory performance can deliver diminishing returns.

This is why the AI hardware industry has become so interested in high-bandwidth memory.

What makes high-bandwidth memory different?

High-bandwidth memory, or HBM, is a specialized form of DRAM designed to transfer very large quantities of data between memory and a nearby processor.

DRAM itself is not new. It is the underlying technology used in conventional computer memory, including the DDR5 modules installed in modern desktops and servers.

HBM changes the physical arrangement.

Instead of placing memory chips on conventional modules or distributing them around a graphics processor, manufacturers stack multiple thin DRAM dies vertically. They connect these layers through tiny electrical pathways running through the silicon, known as through-silicon vias, or TSVs.

The completed memory stacks are integrated extremely close to the processor through advanced packaging technology.

This architecture allows an exceptionally wide interface, transferring data through thousands of connections in parallel.

The result is enormous bandwidth without relying exclusively on extremely high signaling speeds.

For comparison, conventional DDR5 system memory prioritizes flexibility, capacity, cost and compatibility across a wide range of computing devices. Gaming graphics cards generally use GDDR6 or GDDR7, which deliver high bandwidth through memory chips positioned around the GPU.

HBM is optimized for a different balance of requirements: extremely high aggregate bandwidth, energy efficiency per transferred bit and dense integration with high-performance processors.

Memory type	Typical application	Main advantage
DDR5	Desktop PCs and servers	Capacity, flexibility and cost efficiency
GDDR6 / GDDR7	Gaming and professional GPUs	High graphics memory bandwidth
HBM3E / HBM4	AI accelerators and supercomputers	Extremely high bandwidth close to the processor

These memory types are not interchangeable. An AI accelerator designed around HBM cannot simply replace it with ordinary desktop RAM without a fundamental redesign of its architecture.

That specialization helps explain why HBM has become such a strategically important component of the AI supply chain.

Why HBM production is so difficult to expand

Manufacturing conventional memory is already an extraordinarily complex industrial process. HBM adds several demanding steps.

First, manufacturers must produce advanced DRAM dies with extremely precise electrical characteristics. Many of those dies require TSV structures that allow signals to travel vertically through the finished stack.

The silicon must then be thinned, tested, aligned and assembled into stacks containing multiple layers.

A defect in one layer or an imperfect connection between layers can compromise the finished product. Manufacturers therefore need effective testing procedures and high production yields, meaning a sufficiently large proportion of completed devices must pass quality requirements.

As stacks become taller, the engineering difficulties increase.

Heat must move through densely packed silicon layers. Electrical connections must remain reliable. The entire assembly must fit within demanding physical dimensions and survive the stresses associated with packaging and operation.

SK hynix has discussed the growing importance of hybrid bonding, a technology that can connect components more directly and potentially reduce some of the physical limitations associated with conventional microbump connections.

Its technical analysis of hybrid bonding identifies thermal management, stacking height and increasingly fine interconnect spacing as major challenges for future HBM generations.

The difficulty doesn’t end when the memory stack is finished. HBM must be integrated with an expensive accelerator processor, often using advanced interposers and specialized packaging processes.

That creates another potential constraint: a memory manufacturer can increase its output without necessarily increasing the number of complete AI accelerators available, if packaging capacity or another component becomes scarce.

Manufacturing an AI accelerator is therefore a coordinated supply-chain problem. More DRAM wafers alone cannot solve every bottleneck.

HBM4 is already changing the AI hardware race

The industry’s transition from HBM3E to HBM4 illustrates why memory technology is advancing so rapidly.

HBM4 doubles the width of the memory interface from 1,024 to 2,048 data connections, allowing much more information to move in parallel.

Micron reports that its 36GB, 12-layer HBM4 products deliver more than 2.8 terabytes per second of bandwidth per stack, more than twice the bandwidth of its previous-generation HBM3E products.

Samsung advertises HBM4 performance reaching up to 3.3 terabytes per second per stack under its specified operating conditions.

These are manufacturer specifications, not directly comparable independent benchmarks of complete AI systems. Actual performance depends on the processor, memory configuration, workload and system design.

Nevertheless, the scale of the advance is significant.

A single HBM4 stack can transfer data at rates that would have seemed extraordinary for an entire computing system only a few years ago. Advanced AI accelerators can integrate multiple stacks, increasing aggregate bandwidth and memory capacity further.

SK hynix says it is rapidly expanding HBM4 production at its M15X facility in Cheongju. The company expects HBM4 to overtake HBM3E in both shipment volume and revenue during the fourth quarter of 2026.

That transition matters because the latest AI processors are increasingly designed around next-generation memory from the outset.

Nvidia’s Vera Rubin platform, for example, is associated with HBM4 memory supplied by companies including Micron. AMD is also working with Samsung on advanced memory technologies for future AI systems.

But higher-performance memory is not automatically easier to manufacture. Each generation introduces new engineering requirements, qualification processes and production challenges.

An industry can improve the performance of each memory stack while still struggling to produce enough stacks to meet total demand.

Can new factories solve the shortage?

SK hynix, Samsung and Micron are investing heavily in additional memory production and advanced packaging capacity.

SK hynix’s expansion plans include increasing output at its M15X facility, developing the large Yongin semiconductor complex in South Korea and establishing advanced packaging operations in Indiana.

The company says it intends to ramp M15X to maximum capacity by the end of 2026. Its Yongin Phase 1 facility is expected to enter full-scale operation in 2027, contributing to a substantial increase in investment.

Its planned Indiana facility is another important part of the expansion strategy, with next-generation HBM production targeted for later in the decade.

Micron has already announced high-volume production of HBM4, while Samsung has begun commercial shipments of its own next-generation products.

These are tangible industrial developments, not merely forecasts of future demand.

Yet there are reasons to question whether they will immediately eliminate supply constraints.

A semiconductor fabrication plant requires enormous capital investment, specialized equipment, reliable electricity and water supplies, skilled workers and extensive qualification processes. Construction is only the beginning: a new production line must also achieve acceptable yields before it can contribute its intended output.

Advanced packaging capacity must expand alongside wafer production.

Manufacturers also have to decide which memory products deserve the available capacity. Increasing output of one category can affect the resources allocated to another.

The timing of investment is particularly difficult because the memory industry has historically been cyclical. Periods of high prices and strong demand encourage expansion, but new capacity can arrive just as demand slows, producing oversupply and falling margins.

That history gives manufacturers an incentive to expand carefully rather than build factories on the assumption that today’s exceptional prices will last forever.

SK hynix explicitly says it will adjust the scale and timing of its investments according to customer demand, profitability, product competitiveness and capital efficiency.

This is one reason the company’s 2030 outlook deserves attention. It is not simply claiming that factories cannot be built quickly enough. It is describing a market in which technological complexity, customer commitments and investment discipline may keep supply tight for years.

Will the AI memory shortage affect gaming PCs?

The consequences for consumers are more complicated than a simple shortage of every kind of RAM.

A gaming PC typically uses DDR5 system memory and a graphics card equipped with GDDR6 or GDDR7. Neither is physically the same product as the HBM4 used in high-end AI accelerators.

Demand for HBM therefore does not mean AI companies are purchasing the exact memory modules that gamers need.

However, the products are connected through manufacturing capacity, capital investment and the strategic decisions of memory suppliers.

Samsung, SK hynix and Micron must allocate resources among HBM, server DRAM, PC memory, mobile memory and other products.

When enterprise customers are willing to pay high prices for advanced memory and sign long-term contracts, manufacturers have a strong incentive to prioritize those markets.

That can constrain supply growth elsewhere, even when consumer demand is relatively weak.

The effect is already visible in the broader memory industry. SK hynix acknowledged during its October earnings discussion that higher component costs and limited availability could weigh on PC and smartphone shipments, while AI infrastructure demand continues supporting the overall memory market.

For consumers, the possible consequences include higher RAM prices, more expensive graphics cards, reduced memory configurations in some devices and slower improvements in the amount of memory offered at a given price.

But those outcomes will not be uniform.

DDR5, GDDR7 and HBM have different supply conditions, manufacturing requirements and customer bases. Inventory levels, product transitions, competition and regional pricing can all produce different outcomes.

Storage introduces another distinction. NAND flash, used in SSDs, is not DRAM. AI data centers also require enormous storage capacity, but a shortage of HBM does not automatically imply an equivalent shortage of NAND.

The broader concern is that the AI infrastructure boom is changing which customers receive priority throughout the semiconductor industry.

For a related look at these pressures, see our analysis of how AI data centers are competing with gaming PCs for hardware resources.

What a prolonged shortage would mean for AI

For AI developers, constrained memory supply can affect far more than the price of an individual component.

An accelerator manufacturer may have enough processor dies ready for production but be unable to assemble complete products at the desired volume because suitable HBM stacks are unavailable.

That can delay shipments or limit the number of systems delivered to cloud providers.

For data center operators, the result may be longer deployment schedules, higher equipment costs and difficult decisions about how to allocate scarce computing resources.

Memory capacity can also influence system architecture.

If an AI model cannot fit efficiently into the available accelerator memory, developers may distribute it across additional processors. That introduces communication overhead, increases hardware requirements and can make inference more expensive.

Techniques such as quantization, which reduces the numerical precision used to represent model parameters, can lower memory requirements. More efficient attention mechanisms, model compression and improved memory management can also reduce pressure.

But these approaches involve engineering trade-offs. Some workloads tolerate reduced precision extremely well, while others require greater accuracy or more demanding memory configurations.

The industry’s response to a memory shortage is therefore unlikely to consist solely of building more factories.

AI developers may redesign models to use memory more efficiently. Hardware manufacturers may adjust the number and capacity of HBM stacks per accelerator. Cloud providers may optimize how workloads are distributed across systems.

These adaptations could improve the amount of useful AI computation delivered per gigabyte of memory.

They could also make AI systems more complex, particularly when developers must balance performance, cost, latency and energy consumption.

There is a broader consequence for competition. Companies with substantial purchasing power and long-term supply agreements may be better positioned to secure memory than smaller AI developers or emerging infrastructure providers.

If the most advanced memory remains scarce, access to it could become a competitive advantage in its own right.

How credible is the 2030 prediction?

SK hynix has good reasons to understand the memory market. It is a major supplier of advanced DRAM and HBM, with direct visibility into orders, customer negotiations and the difficulties of increasing production.

Its warning is therefore more meaningful than a speculative forecast from an outside observer.

But it also has commercial interests. Strong demand and constrained supply support higher prices, stronger margins and long-term customer commitments.

A manufacturer forecasting tight supply is not an independent authority on the future of the entire market.

There are also several uncertainties between now and 2030.

AI infrastructure investment could grow more slowly than expected if customers struggle to earn adequate returns on their spending. More efficient models could reduce memory requirements for some applications. New factories and packaging technologies could increase supply faster than anticipated.

Conversely, AI agents, longer context windows, multimodal models and growing inference workloads could create additional demand that offsets improvements in efficiency.

The effect of cheaper and more efficient AI is particularly difficult to predict. Lower computing costs may reduce the memory needed for a given task, but they can also encourage much greater use of AI, increasing total demand.

SK hynix’s forecast is best understood as a warning about the current trajectory of the industry rather than a fixed prediction of what memory prices or availability will look like in every year through 2030.

Its signed long-term agreements provide evidence of demand over the next two years. Its manufacturing investments provide evidence of supply expansion. Neither establishes the exact size of the global memory deficit four years from now.

What the forecast does establish is the growing importance of memory in the economics of artificial intelligence.

For much of the AI boom, the public conversation has focused on processors: how many GPUs a company can buy, how much computing power a new accelerator delivers and how quickly Nvidia can release another generation.

Those questions remain important. But an accelerator’s performance depends on the entire system surrounding it, including the memory that stores and delivers the data it needs.

The next major constraint on AI development may not be how quickly the industry can build faster processors. It may be how quickly it can manufacture enough advanced memory to keep those processors working.

And if SK hynix’s assessment proves even partly correct, that challenge could shape the AI industry for the rest of the decade.